Theses
Students interested in doing their bachelor, masters or diploma thesis in our group, please contact Prof. Dr. Schindler, or directly to the responsible research group member, respectively.
List of currently open theses
(bachelor, master, diploma, student projects)
- Seitenkanalangriff
auf verschiedene Speicherkonzepte (Master Theses)
Advisor: Marc Stöttinger, Integrated Circuits and Systems Lab (TUD-ISS) - CUDA
vs. FPGA zur beschleunigten Korrelationsanalyse von
Seitenkanälen (Master Theses)
Advisor: Marc Stöttinger, Integrated Circuits and Systems Lab (TUD-ISS) - Beschleunigte
Seitenkanalanalyse mit CUDA und OpenCL (Master Theses)
Advisor: Marc Stöttinger, Integrated Circuits and Systems Lab (TUD-ISS)






