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Marc Stöttinger, Researcher Technische Universität Darmstadt, PhD candidate Technische Universität Darmstadt Integrated Circuits and Systems Lab (ISS) phone: +49 6151 - 16 50174 e-mail: stoettingeriss.tu-darmstadt.de

Visitor Address:

Center for Advanced Security Research Darmstadt (CASED)
Mornewegstrasse 32, D-64293 Darmstadt, 3rd floor, room 3.1.16
phone: +49 6151 - 16 50174

Postal Address:

Technische Universität Darmstadt - Integrated Circuits and Systems Lab (ISS)
Hochschulstrasse 10, D-64289 Darmstadt, Germany

Fields of Interest:

• Cryptographic hardware
• Side-channel attack on FPGA implementations
• Stochastic methods in side channel cryptanalysis
• Efficent implementation of cryptographic primitives on FPGA
• Countermeasure techniques against Power analysis attacks on FPGA

Teaching 

• Power Analysis of Block Ciphers, WS2010/2011
  TU Darmstadt, laboratory course
  
• Modellierung heterogener Systeme, WS2010/2011
  TU Darmstadt, teaching assistance, exercise
  
• Modellierung heterogener Systeme, WS2009
  TU Darmstadt, teaching assistance, exercise
  

Papers and Publications:

• M. Kasper, W. Schindler, M. Stöttinger: A Stochastic Method for Security Evaluation of Cryptographic FPGA Implementations. To appear in: Proceedings of the 2010 International Conference on Field-Programmable Technology, IEEE, 2010.
• M. Stoettinger, A. Biedermann, S. A. Huss: Virtualization within a Parallel Array of Homogeneous Processing Units. In: Proceedings of the 6th International Symposium on Applied Reconfigurable Computing, Lecture Notes in Computer Science, 17-28, March 2010
  
• M. Stoettinger, F. Madlener, S. A. Huss: Procedures for Securing ECC Implementations against Differential Power Analysis Using Reconfigurable Architectures. In: M. Platzner, J. Teich, N. Wehn (eds.): Dynamically Reconfigurable Systems - Architectures, Design Methods and Applications, Springer, 305-321, December 2009
  
• F. Madlener, M. Stoettinger, S. A. Huss: Novel Hardening Techniques against Differential Power Analysis for Multiplication in GF(2^n). In: Proceedings of the IEEE International Conference on Field-Programmable Technology (ICFPT'09), December 2009
  
• A. Shoufan, F. Strenzke, H. G. Molter, M. Stoettinger: A Timing Attack Against Patterson Algorithm in the McEliece PKC. In: Proceedings of the 12th International Conference on Information Security and Cryptology (ICISC'09), Lecture Notes in Computer Science, December 2009
  
• M. Stoettinger: Control Path Optimized Architecture Design Based on a Genetic Algorithm, Diploma Thesis, October 2008